@foone I'm surprised there's not random white pixels on the screen given how it looks
Notices by Andrew Zonenberg (azonenberg@ioc.exchange), page 3
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Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Monday, 16-Dec-2024 00:03:00 JST Andrew Zonenberg
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Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Wednesday, 11-Dec-2024 17:18:25 JST Andrew Zonenberg
@dalias @vogelchr Except it's not 2 mA. Look at the (self contradictory) datasheet.
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Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Wednesday, 11-Dec-2024 17:15:39 JST Andrew Zonenberg
So apparently you can buy 250VAC/VDC rated 2 mA fuses.
What kind of situation would call for this???
https://www.digikey.com/en/products/detail/eaton-electronics-division/BK-AGC-B-2-10/5419750
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Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Thursday, 05-Dec-2024 01:28:55 JST Andrew Zonenberg
@dalias @ireneista @mjg59 10baseT is extremely straightforward from an electrical perspective, to the point that given some time I could decode and synthesize waveforms with a pencil and paper.
100baseTX is complex enough you really wouldn't want to do it by hand, but still well within the point of where you can learn the basics of in a few hours.
As far as "anything reasonable" as someone doing test and measurement equipment design I'd somewhat disagree... in metrology work you can easily saturate tens of Gbps with digitized analog data.
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Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Thursday, 05-Dec-2024 01:23:23 JST Andrew Zonenberg
@ireneista @dalias @mjg59 Yeah.
I'm *close*. I've done semiconductor deprocessing (which uses a lot of etch techniques from fab), gate level reverse engineering so I have a decent understanding of standard cell logic and memory arrays.
I've done DIY lithography down to ~10um feature size, lots of FPGA gateware, and consulted on a 28nm ASIC project in which I did all of the HDL development for the chip but another guy did the physical layout and it was fabbed by TSMC, and yet another team member did the complex multi-die BGA package design.
And the standard cell library, SRAM compilers, PLL, and SERDES were third party IPs that I just used as black boxes.
So going from that to "I've written a bare metal TCP/IP stack, SSH server, and for a different project a basic RTOS" means I have a significant fraction of the stack covered at "made a smol one" level.
But that's still soooo far from all of the things you'd need to build a modern CPU and OS and JS engine from scratch even if you had all of the tools.
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Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Thursday, 05-Dec-2024 01:23:22 JST Andrew Zonenberg
@ireneista @dalias @mjg59 Hell I even made a 10/100 Ethernet PHY from an FPGA and a dozen resistors years back (and got a POC||GTFO article out of it) just to prove a point.
But 1000baseT for example is a completely different animal.
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Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Wednesday, 04-Dec-2024 17:05:28 JST Andrew Zonenberg
@ireneista @mjg59 As someone with a PhD in OS security crossed with computer architecture who also does semiconductor RE, I think you're never going to find someone who truly understands every layer completely.
The most you'll find is someone who's got expert level familiarity with a handful of domains and basic awareness of the rest of the stack.
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Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Wednesday, 04-Dec-2024 17:05:28 JST Andrew Zonenberg
@ireneista @mjg59 Yeah I'm probably about as close as you're going to find to a "lithography to Linux userspace" full stack nerd, but there's still holes in my knowledge.
I understand the common fab processes and CMOS layout at a high level, but am weak to clueless on a lot of the transistor device physics when it comes to things like quantitative doping levels, gate work functions, etc. And if you asked me to fine tune process parameters for CMP I'd be completely lost.
I'm comfortable working at the RTL level and am generally familiar with computer architecture but you could easily get quite a few PhDs in just one narrow area of out-of-order execution scheduling, something I haven't touched at all.
And that's before you even start running software on the core.
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Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Tuesday, 03-Dec-2024 18:50:10 JST Andrew Zonenberg
@aud My reading is that "outlier AI" is the name of the company.
In other words, it's just saying "we'll pay you what we want to pay you" and doesn't necessarily mean that the ML model will set your salary.
Although I'm sure they're thinking about it.
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Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Tuesday, 03-Dec-2024 18:50:09 JST Andrew Zonenberg
@aud I'm just so used to startups called "foobar AI" that seemed the obvious reading.
That's marketing techbro speak for "this is not a place of honor".
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Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Monday, 02-Dec-2024 14:28:22 JST Andrew Zonenberg
@ireneista @dalias Navigation is a big one. Especially in dense forest, over open ocean, in bad weather, etc. GPS makes things much much better.
On the plus side, GPS birds live high enough up that they're unlikely to be affected by LEO clutter. The big concern is during launch and orbital insertion, when you're still down low. But it's unlikely we'd reach a truly apocalyptic Kessler situation where LEO is so full of debris you're guaranteed to be struck within minutes. Just "lifetimes are unacceptably short".
So you might need a slightly more energetic booster to lift it up to the working orbit quickly so it doesn't spend too long in Kessler-land, and might lose a few percent of your replacement GPS craft to impacts on the way up, but it wouldn't be a complete denial of higher orbits.
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Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Saturday, 30-Nov-2024 11:07:21 JST Andrew Zonenberg
@ireneista @dalias @mcc Every laptop has a 24 kHz 2 element phased array in it. Propagation velocity is low enough to enable easy TOF range finding to inch level resolution, even less if you do phase correlation measurements.
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Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Saturday, 30-Nov-2024 11:04:20 JST Andrew Zonenberg
@mcc @dalias @ireneista Yes it did real time HMAC based authentication with latency measurements based on the speed of sound and direction finding using the laptop stereo mics.
An RF relay could potentially work but you'd need to keep it very close to keep the total E2E latency including sound travel path less than say 10 ms depending on how big your geofence is.
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Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Saturday, 30-Nov-2024 10:59:17 JST Andrew Zonenberg
@dalias @ireneista @mcc Reminds me of a project I was working on years ago. Ultrasound based dead man's switch that verifies a hardware token in your pocket etc is within a geofence of the computer.
The idea was that if you get tackled and dragged away from your computer, laptop stolen off the table in front of you, etc. it'll automatically run a script to lock, shut down, remote wipe, etc. depending on your threat model.
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Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Tuesday, 19-Nov-2024 02:56:34 JST Andrew Zonenberg
@wb2ifs @EndemicEarthling @pteryx @pluralistic There are legitimate technical reasons there WRT mixer tuning ranges etc. Something meant to run at carriers in the 1-2 GHz region might well have trouble tuning down to 100 MHz - much less 1 MHz for AM - without that being an explicit design requirement (perhaps involving extra hardware to bypass a mixer etc)
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Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Thursday, 14-Nov-2024 18:29:33 JST Andrew Zonenberg
@SwiftOnSecurity I've always considered security to be a subset of reliability, emphasizing on faults triggered by malicious actors rather than random malfunctions.
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Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Tuesday, 05-Nov-2024 06:12:17 JST Andrew Zonenberg
@0xabad1dea Oh we get that too.
But in a recent project we were promised a bunch of (redacted) in shipping configuration plus a couple with jtag enabled, debug console active, etc so we could poke around and study it more.
Never got that. Or source code. Or unencrypted firmware binaries. Or any of the other goodies we were supposed to get.
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Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Tuesday, 05-Nov-2024 06:12:00 JST Andrew Zonenberg
@0xabad1dea Story of my life.
Also things like debug edition firmware that half the time we're promised we never get.
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Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Sunday, 03-Nov-2024 09:29:20 JST Andrew Zonenberg
@gsuberland @dalias @puppygirlhornypost2 As someone who has experience with esoteric computer architectures, designing password crackers, and memory hardness, I hate argon2.
They seem to have done everything right to make it very difficult to accelerate.
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Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Sunday, 03-Nov-2024 05:13:45 JST Andrew Zonenberg
@dalias Most of the random cheap IP security cameras on Amazon have H264 RTSP streams available.
They do usually have horrible firmware full of cloud BS and require some sketchy windows binary for initial provisioning, but you can set it up from a VM then note the URL of the stream, wipe the VM, and just access the raw stream with zoneminder or VLC or whatever.
Put it on a subnet with no outbound allowed and you're good to go.