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   Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Wednesday, 04-Dec-2024 17:05:28 JST Andrew Zonenberg

   • Matthew Garrett

   @ireneista @mjg59 Yeah I'm probably about as close as you're going to find to a "lithography to Linux userspace" full stack nerd, but there's still holes in my knowledge.

   I understand the common fab processes and CMOS layout at a high level, but am weak to clueless on a lot of the transistor device physics when it comes to things like quantitative doping levels, gate work functions, etc. And if you asked me to fine tune process parameters for CMP I'd be completely lost.

   I'm comfortable working at the RTL level and am generally familiar with computer architecture but you could easily get quite a few PhDs in just one narrow area of out-of-order execution scheduling, something I haven't touched at all.

   And that's before you even start running software on the core.

   • Embed this notice
     Rich Felker (dalias@hachyderm.io)'s status on Wednesday, 04-Dec-2024 17:05:27 JST Rich Felker

     in reply to

     • Matthew Garrett

     @azonenberg @ireneista @mjg59 I think there's a difference in "understanding every layer completely" and "understanding each layer sufficiently to replicate the next".

     Haelwenn /элвэн/ :triskell: likes this.
   • Embed this notice
     Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Wednesday, 04-Dec-2024 17:05:28 JST Andrew Zonenberg

     in reply to

     • Matthew Garrett

     @ireneista @mjg59 As someone with a PhD in OS security crossed with computer architecture who also does semiconductor RE, I think you're never going to find someone who truly understands every layer completely.

     The most you'll find is someone who's got expert level familiarity with a handful of domains and basic awareness of the rest of the stack.