Notices by Graham Sutherland / Polynomial (gsuberland@chaos.social), page 3
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Graham Sutherland / Polynomial (gsuberland@chaos.social)'s status on Friday, 07-Feb-2025 02:51:32 JST Graham Sutherland / Polynomial
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Graham Sutherland / Polynomial (gsuberland@chaos.social)'s status on Thursday, 06-Feb-2025 18:01:41 JST Graham Sutherland / Polynomial
@ryanc you'd be surprised how often they do fuse off JTAG, even with no firmware signing. it's the minority case where I find a commercial product with JTAG debug enabled and working.
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Graham Sutherland / Polynomial (gsuberland@chaos.social)'s status on Thursday, 06-Feb-2025 18:01:40 JST Graham Sutherland / Polynomial
@ryanc if it does have JTAG somewhere and you can find it and identify the pinout, you'll want a knock-off Segger J-Link. cheap one off eBay or AliExpress, don't bother paying them for the real deal, the cheapo ones work identically. I've seen them for less than £20.
whatever you do, don't bother with OpenOCD's BusPirate JTAG thing, it's literally never worked, you'll spend hours and get nowhere, they really need to pull it from the project.
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Graham Sutherland / Polynomial (gsuberland@chaos.social)'s status on Thursday, 06-Feb-2025 18:01:39 JST Graham Sutherland / Polynomial
@ryanc I think wq wrote a thing for Glasgow for doing JTAG pinout identification? either that or I dreamed it lol, hard to tell these days
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Graham Sutherland / Polynomial (gsuberland@chaos.social)'s status on Thursday, 06-Feb-2025 18:01:22 JST Graham Sutherland / Polynomial
@ryanc @manawyrm looks like the shielding comes off with just two screws? if you can get a photo with the shielding off on that side, might be possible to spot some goodies
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Graham Sutherland / Polynomial (gsuberland@chaos.social)'s status on Thursday, 06-Feb-2025 17:48:11 JST Graham Sutherland / Polynomial
@manawyrm @ryanc holding the CPU in reset would not necessarily put the SPI IOs in a hi-Z state though, and I have seen folks kill boards by trying to assert CS and essentially dead-shorting the low-side output FET on the MCU's GPIO across the rails. with sufficient resistance you can avoid that but it requires calculating the necessary value based on the max sink current rating for the chip, and then you have to think about IO thresholds with any existing pull-ups/pull-downs... it gets messy.
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Graham Sutherland / Polynomial (gsuberland@chaos.social)'s status on Thursday, 06-Feb-2025 17:45:39 JST Graham Sutherland / Polynomial
@ryanc that requires an ICSP or JTAG header, and may not work if the security config on the chip says no (you can disable everything but boundary scan, for example, which will prevent debug and firmware upload)
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Graham Sutherland / Polynomial (gsuberland@chaos.social)'s status on Thursday, 06-Feb-2025 17:29:36 JST Graham Sutherland / Polynomial
@ryanc got an Arduino, ESP8266, or ESP32 board to hand? pretty easy to wire up and write a little program to write to it if your existing tools won't do it.
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Graham Sutherland / Polynomial (gsuberland@chaos.social)'s status on Thursday, 06-Feb-2025 17:27:12 JST Graham Sutherland / Polynomial
@ryanc the SPI IOs will still be asserted, they don't go hi-Z.
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Graham Sutherland / Polynomial (gsuberland@chaos.social)'s status on Thursday, 06-Feb-2025 17:27:11 JST Graham Sutherland / Polynomial
@ryanc (this is why I always pull the chip. it's a huge pain in the ass to do it in-system and I can't guarantee a good read)
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Graham Sutherland / Polynomial (gsuberland@chaos.social)'s status on Thursday, 06-Feb-2025 17:24:08 JST Graham Sutherland / Polynomial
@ryanc wouldn't that just not power the chip, so it won't respond? you won't be able to read it with the DUT powered on as it'll be asserting the SPI signals - best case no bueno, worst case you'll cook the MCU's IOs.
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Graham Sutherland / Polynomial (gsuberland@chaos.social)'s status on Thursday, 06-Feb-2025 17:19:23 JST Graham Sutherland / Polynomial
@ryanc yeah might be a full removal job then unfortunately.
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Graham Sutherland / Polynomial (gsuberland@chaos.social)'s status on Thursday, 06-Feb-2025 17:15:06 JST Graham Sutherland / Polynomial
@ryanc SOIC-16? interesting. that sounds... not SPI? usually those are SOIC-8. QSPI or something?
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Graham Sutherland / Polynomial (gsuberland@chaos.social)'s status on Thursday, 06-Feb-2025 17:08:42 JST Graham Sutherland / Polynomial
@ryanc soldering iron and tweezers, lift the power leg slightly, put paper or kapton tape under it.
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Graham Sutherland / Polynomial (gsuberland@chaos.social)'s status on Thursday, 06-Feb-2025 17:08:41 JST Graham Sutherland / Polynomial
@ryanc although I usually just end up lifting the whole chip 'cos by the time I'm breaking out the iron I might as well take it off completely lol
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Graham Sutherland / Polynomial (gsuberland@chaos.social)'s status on Wednesday, 05-Feb-2025 06:44:22 JST Graham Sutherland / Polynomial
too hung over to read through the AMD microcode vuln thing but lmao at the proof of concept being "we made RDRAND only return 4"
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Graham Sutherland / Polynomial (gsuberland@chaos.social)'s status on Tuesday, 04-Feb-2025 00:51:13 JST Graham Sutherland / Polynomial
wild to me that I can just go buy ten thousand discretely-useful manufactured objects for the price of a burger
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Graham Sutherland / Polynomial (gsuberland@chaos.social)'s status on Friday, 31-Jan-2025 17:47:35 JST Graham Sutherland / Polynomial
just read a review of some smoked salmon that complained that it tasted "too fishy".
it's FISH
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Graham Sutherland / Polynomial (gsuberland@chaos.social)'s status on Friday, 31-Jan-2025 17:47:34 JST Graham Sutherland / Polynomial
wait hang on it gets funnier
there is also another review by a different person that said it was the best smoked salmon that they've ever had because *other* smoked salmon tastes too fishy, and this one "uses the good hot smoke".
and they rated it 4 stars.
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Graham Sutherland / Polynomial (gsuberland@chaos.social)'s status on Friday, 31-Jan-2025 17:47:33 JST Graham Sutherland / Polynomial
so I have established that:
- it is too fishy
- it is not at all fishy
- uses the good hot smoke
- it is the best
- but not numerically the best