Studio 8502 :verified:
Okay. Big old image heavy thread. There will be no alt text, because alt text that accurately describes schematic diagrams would get real repetitive repetitive real real fast fast. Sorry.
Schematic review, a section at a time. Let's start with the CPU. The W65C265S, clocked at 8MHz. I doubt I got anything wrong here. Capacitors are 1%, 0402 SMDs unless otherwise noted. The CPU for this revision is a PLCC84 (SMD socket) because I have a tube full of the things on my desk.
Studio 8502 :verified:
The design will be released under the CERN Open Hardware Licence (Permissive) version 2. I don't care who makes them, who sells them, how much they charge, none of that means anything to me. I plan to make and sell them as inexpensively as possible, because if people can't afford your fancy tech toy, then it doesn't matter how good it is, it still sucks.
Studio 8502 :verified:
It is also what I consider the minimum viable product. I have removed everything I could justify calling bloat, pared down the hardware as far as I can do, made it into something that can be produced at either major hobbyist fab house from all new parts, all still in production.
Studio 8502 :verified:
This design represents the sum total of everything I want in a retro computer/games machine. It will be simple to program for (in C or asm, hopefully also Pascal and other languages eventually) *and* on (once it has native on-device tooling). It has the hardware muscle to do almost anything with sprites and tiles you can come up with. It is superior hardware to the SNES -- much closer to the Neo•Geo, though not its equal. Faster than an unaccelerated Apple IIgs or Amiga 1200, as well.
Studio 8502 :verified:
Aside from some buttons and LEDs, that's your lot. I hope it works. If you notice something I have got wrong, you would be doing me a favour telling me about it. I intend this design to be as inexpensive to manufacture as possible; Rev0 is specifically to prove it works, while Rev1 will fix any known issues in Rev0, and make the CPU a TQFP-100 instead of the PLCC-84.
Studio 8502 :verified:
Finally, the cartridge/expansion port. Not a multi-slot bus, just a single port for a cartridge which is mechanically and electrically compatible with the Mega Drive/Genesis, but not logically so. This makes producing physical releases very easy. The cart slot provides the full system bus, DMA access, I2C, and audio passthrough for whatever crazy shit you can come up with.
Studio 8502 :verified:
The power supply is stupid simple. USB-C provides 5V/3A (15W) of DC, which feeds a 3.3V regulator. The reset supervisor only allows /RES to go high when the power stabilizes, and also debounces the reset button.
Studio 8502 :verified:
We have two SNES controller ports which have been enhanced by assigning the unused two pins to the I2C bus; this will enable many accessories to be made for this port, including keyboards or other such custom interface devices.
The system supports four SNES controllers; the signals for all four are on the internal control header, suitable for whatever case design you have in mind.
The clock port does pretty much what the Amiga's clock port does, plus a debug serial line and I2C.
Studio 8502 :verified:
The SD card is handled using the VERA's SPI bus, which it uses to bootload the FPGA as well; once the FPGA is loaded, the CDONE output goes high, which causes the bus switch here to connect the SD card port to the pins. Select logic is multiplexed in the glue chip, so the FPGA's select line selects the SD card if and only if CDONE is high.
Studio 8502 :verified:
VERA outputs 12-bit R4G4B4 video, which gets passed through a trio of 4-bit R2R ladder DACs before hitting the 15-pin video connector. The diodes are for ESD protection.
Studio 8502 :verified:
The VERA audio, processed by the I2S DAC, gets piped to this mixer circuit to be mixed with the line-level audio from the expansion cart port, and output to two RCA plugs, exactly like the Amiga had. Not using mini-plug helps remind that this is line-level audio, not suited for headphones.
Studio 8502 :verified:
The VERA outputs digital audio over I2S, which feeds this DAC. Again, cheap and cheerful.
Studio 8502 :verified:
An FPGA needs configuration ROM. Here, just a cheap and cheerful SPI flash chip.
Studio 8502 :verified:
The FPGA for the VERA is only very slightly different from the X16's implementation. It was more efficient on hardware to make the VERA IRQ output active-high, since I had an extra active-high interrupt line in the CPU to use up.
Studio 8502 :verified:
SRAM and ROM are 512KB each. SRAM is a TSOP, ROM is a socketed PLCC. Nothing complex or innovative or even clever here -- ROM gets selected by the /LOROM or /HIROM signals through the /ROM0 output of the glue chip.
Studio 8502 :verified:
Glue logic is an ATF22LV10C programmable logic device. Cheap and cheerful, even if CUPL *sucks* so *hard* as an HDL. The code for this is ~90% written.
Studio 8502 :verified:
Our various active-high/active-low signals get appropriate pull up/down resistors; 0402 SMD again.
gnutelephony
@mos_8502 this kind of hardware we may come to desperately need, widely, as the slow and very deliberate destruction of general purpose computing continues.
gnutelephony
@mos_8502 I was thinking of collapse OS, which really has hardware that is much more limited. The danger I see most is not outright collapse, but rather loss of freedom to run and the end of manufacture of and access to general purpose computing for most people.
Studio 8502 :verified:
@gnutelephony I don't know much about that. There are lots of designs probably better suited to that than whatever I can come up with. Cheaper, too, most likely. But I would consider it a stunning success if it sold 1,000 units. Retrocomputing is a small world, and it's really tough to get people to pay hundreds of dollars for a machine with zero (at the moment) software.
GNU social JP is a social network, courtesy of GNU social JP管理人. It runs on GNU social, version 2.0.2-dev, available under the GNU Affero General Public License.
All GNU social JP content and data are available under the Creative Commons Attribution 3.0 license.