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   Studio 8502 :verified: (mos_8502@soc.studio8502.ca)'s status on Sunday, 17-Dec-2023 10:36:11 JST Studio 8502 :verified:

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   The SD card is handled using the VERA's SPI bus, which it uses to bootload the FPGA as well; once the FPGA is loaded, the CDONE output goes high, which causes the bus switch here to connect the SD card port to the pins. Select logic is multiplexed in the glue chip, so the FPGA's select line selects the SD card if and only if CDONE is high.