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@iliana @dalias @cliffle Working on it, although I'm a long ways from having something Oxide-scale.

LATENTRED is Kintex UltraScale+ based and will have 48x 1G baseT edge ports and two SFP28 uplinks.

The next-generation model, once I finish LATENTRED, will tentatively be Efinix Titanium based. I haven't decided on the exact mix of ports but the upcoming Titanium v2 parts have up to 40x 25G SERDES lanes, so I should be able to do 10x 100G QSFP28 or, hypothetically, 5x 200G QSFP-DD, with one FPGA.

I might consider a multi-FPGA design with a couple of big Titaniums connected by a bunch of transceiver lanes with the rest used as front panel ports, not sure of details yet.