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Sexy Moon (moon@shitposter.club)'s status on Thursday, 23-Nov-2023 20:50:38 JST 
Sexy Moon
can anyone explain to me "your machine isn't a pdp-11, C isn't close to hardware" pointers and structs go directly to memory down to the bit level and if you use a compiler like Tiny C Compiler without optimizations stuff maps close to cpu instructions -
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Sexy Moon (moon@shitposter.club)'s status on Thursday, 23-Nov-2023 20:54:09 JST
Sexy Moon
@jeff what do you mean? -
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autism :verified: (jeff@misinformation.wikileaks2.org)'s status on Thursday, 23-Nov-2023 20:54:10 JST 
autism :verified:
@Moon you run in userland -
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Sexy Moon (moon@shitposter.club)'s status on Thursday, 23-Nov-2023 20:55:09 JST
Sexy Moon
@piggo @methyltheobromine @newt I'm not really defending C I just don't understand the statement very well. -
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NEETzsche (neetzsche@iddqd.social)'s status on Thursday, 23-Nov-2023 20:55:12 JST 
NEETzsche
Okay so basically if it’s not ASM then it’s a high level scripting language and you’re a webshit soydev. The only exceptions to this are autism languages that have nothing going for them outside of how “functional” they are. For more information visit /g/ on 4chan.
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Piggo :verified_horse: (piggo@piggo.space)'s status on Thursday, 23-Nov-2023 20:55:12 JST 
Piggo :verified_horse:
@methyltheobromine @Moon @newt wait for someone to explain how you are dumb for not using C++ and exceptions actually make sense and the syntax is not insane -
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:blobcatflower: (methyltheobromine@netzsphaere.xyz)'s status on Thursday, 23-Nov-2023 20:55:15 JST 
:blobcatflower:
@Moon cc @newt -
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Piggo :verified_horse: (piggo@piggo.space)'s status on Thursday, 23-Nov-2023 21:00:24 JST
Piggo :verified_horse:
@methyltheobromine @Moon @newt i wish D was less broken by design, looked promising Sexy Moon likes this. -
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Piggo :verified_horse: (piggo@piggo.space)'s status on Thursday, 23-Nov-2023 21:00:26 JST
Piggo :verified_horse:
@methyltheobromine @Moon @newt well that too -
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:blobcatflower: (methyltheobromine@netzsphaere.xyz)'s status on Thursday, 23-Nov-2023 21:00:28 JST
:blobcatflower:
@piggo @Moon @newt C++ is not even insane it's just retarded -
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Sexy Moon (moon@shitposter.club)'s status on Thursday, 23-Nov-2023 21:01:27 JST
Sexy Moon
@djsumdog @jeff yeah if you write a pure math function in C it's not being interpreted by the operating system -
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djsumdog (djsumdog@djsumdog.com)'s status on Thursday, 23-Nov-2023 21:01:28 JST 
djsumdog
The program itself is still compiled down to a format that directly mentions registers, stack pointers, memory loads ... it's still running those actual instructions. The kernel just interrupts it after a given number of cycles and the memory map isn't real; it's virtual pages (which still has special instructions in hardware that the kernel calls). -
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autism :verified: (jeff@misinformation.wikileaks2.org)'s status on Thursday, 23-Nov-2023 21:01:29 JST
autism :verified:
@Moon your program is being interpreted by the kernel and they run close to the hardware -
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NEETzsche (neetzsche@iddqd.social)'s status on Thursday, 23-Nov-2023 21:02:17 JST
NEETzsche
Exactly. Did you read Writing Software That Actually Works Considered Harmful? The site it runs on doesn’t display the text if you have JavaScript enabled to filter securitylets.
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Sexy Moon (moon@shitposter.club)'s status on Thursday, 23-Nov-2023 21:10:37 JST
Sexy Moon
@djsumdog @jeff > All of the greatest engineers in the world use Emacs. The world-changer types.
need to learn emacs -
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djsumdog (djsumdog@djsumdog.com)'s status on Thursday, 23-Nov-2023 21:10:38 JST
djsumdog
Makes me think of that old tour-de-babel rant about programming languages
https://sites.google.com/site/steveyegge2/tour-de-babel -
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armpit licker feet smeller (tiskaan@fedi.layer02.net)'s status on Thursday, 23-Nov-2023 21:15:21 JST 
armpit licker feet smeller
@Moon @djsumdog @jeff all the wrost engineers also use emacs.
its a coinflip moon becarefulSexy Moon and Haelwenn /элвэн/ :triskell: like this. -
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Sexy Moon (moon@shitposter.club)'s status on Thursday, 23-Nov-2023 21:26:28 JST
Sexy Moon
@wolf480pl @piggo @pony @methyltheobromine @newt ok, this makes sense, but do you ever have access to this or is it always hidden because a straightforward instruction set? -
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Wolf480pl (wolf480pl@mstdn.io)'s status on Thursday, 23-Nov-2023 21:26:30 JST 
Wolf480pl
@piggo @pony @methyltheobromine @Moon @newt
I don't think the OS plays that much of a role in this issue.The key point is that C superficially looks like a linear sequence of instructioms operating on a single, uniform, linearly addressable memory, and while thay was true on PDP-11, on modern CPUs of the big kind (like AMD Ryzen or ARM Cortex-A) that's not the case.
1/
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Wolf480pl (wolf480pl@mstdn.io)'s status on Thursday, 23-Nov-2023 21:26:30 JST
Wolf480pl
@piggo @pony @methyltheobromine @Moon @newt
These CPUs are out-of-order superscalar - they reorder instructions, and execute multiple insns in parallel, as long as all the dependencies on results of previous instructions are satisfied.Moreover, they have hierarchies of caches, and multiple cores, each core sering the memory differently than other cores.
And then in multi-socket servers there's NUMA.
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Piggo :verified_horse: (piggo@piggo.space)'s status on Thursday, 23-Nov-2023 21:26:32 JST
Piggo :verified_horse:
@pony @methyltheobromine @Moon @newt (assuming there is any operating system and caches) -
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Cat poni, lgbt feminist drag nato demon (pony@blovice.bahnhof.cz)'s status on Thursday, 23-Nov-2023 21:26:33 JST
Cat poni, lgbt feminist drag nato demon
@piggo @methyltheobromine @Moon @newt but it isn’t really that close to the hardware? Unless you think about the operating system as hardware, but you have no idea where things really are (and you don’t necessarily know how the pages align so that’s also fun). -
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Wolf480pl (wolf480pl@mstdn.io)'s status on Thursday, 23-Nov-2023 21:40:09 JST
Wolf480pl
@Moon @pony @methyltheobromine @piggo @newt that being said, with assembly you have a more direct access to the primotives used to manage this implicit concurrency - fences, cache flush instructions, atomic instructions, etc. - in C these are usually packed into __vendor_extensions or wrapped by high-level concurrency libs like pthreads.
2/
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Wolf480pl (wolf480pl@mstdn.io)'s status on Thursday, 23-Nov-2023 21:40:10 JST
Wolf480pl
@Moon @pony @methyltheobromine @piggo @newt
On most CPUs I know about, the instruction set tries to give you the same illusion of linear execution and memory. There were atrempts to go lower - there were the VLIW, and more recently The Mill CPU. The former failed miserably outside of GPU / DSP land. The latter, to my knowledge, hasn't produced a single physical CPU yet.1/
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Wolf480pl (wolf480pl@mstdn.io)'s status on Thursday, 23-Nov-2023 21:42:15 JST
Wolf480pl
@Moon @pony @methyltheobromine @piggo @newt Also, I think LLVM IR, or some other static-single-assignment format, is a better model of how the CPU sees the program, but technically it's not closer to hardware than assembly.
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翠星石 (suiseiseki@freesoftwareextremist.com)'s status on Thursday, 23-Nov-2023 22:20:37 JST 
翠星石
@jeff >your program is being interpreted by the kernel
Sorry, but I'd just like to interject for a moment.
Kernels don't typically interpret C programs - what they do instead is schedule the process and at certain time periods, load all the registers back from the stack, jmp execution to the right instruction in .data and after a set period, dump all the registers to stack and then jmp execution elsewhere.
If a kernel does this thousands of times a second, it looks like the computer is doing a bunch of things at once, although only one thing is happening at a time. -
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翠星石 (suiseiseki@freesoftwareextremist.com)'s status on Thursday, 23-Nov-2023 22:22:36 JST
翠星石
@Moon Your wish is my command.
>your machine isn't a pdp-11
This is true simply because the CPU arch is different, you're not allowed to program the microcode (a free microcode was developed for the PDP-11 for example), it's not feasible to write anything but small functions in straight machine code like it could be done on the PDP-11 and machine code instructions are rarely executed directly on the metal anymore.
For AMD64 CPUs, when machine code instructions are read by the instruction decoder, the instructions are usually converted into micro-ops instead of being executed directly and then those micro-ops are passed to the execution engine that does lots of dark magic like instruction reordering, simultaneous execution and speculative execution. As a result, even if you write in assembly, the actual instructions that get executed are very different (in most cases the behavior is the same, but not always - there are bugs in the execution engine for example).
>C isn't close to hardware
C isn't close to the hardware simply because the language allows you to construct structures and mechanisms that have no equivalent machine code instructions - but the compiler is very good at generating all the instructions required to carry out your will.
With gcc at high optimization levels, it's rare that the output looks anything but vaguely similar to the input - gcc's optimizer is so good that it detects when it's most performant to wrap or unwrap loops, add padding to make a function larger, but run faster, when to turn division or modulo into faster multiplication instructions, when to use the fastest equivalent out of addition, LEA or MUL instructions for multiplication, optimize alignment and much, much more.
Pretty much, with C, gcc can do whatever it damn well pleases as long as the operations executed in the end are the same, or in the case of undefined behavior, it can do anything it wants, including making demons fly out of your nose.
>pointers and structs go directly to memory down to the bit level
That isn't the case anymore sadly.
Memory Management Units, address remapping, caching and the buffering of RAM I/O means that memory isn't controllable to the bit level anymore.
For example, if the CPU detects that a chunk of memory is being used a lot, that memory may be loaded into the cache and further reads and writes will be mapped to those bytes in the cache - without the original memory address or pointer addresses changing on the programming side at all.
The CPU at a later time may flush the cache and schedule for the cache contents to be written back to the main memory, replacing the old dirty memory (yes, there are a lot of very confusing bugs that result from reading stale cache or RAM).
Memory sadly isn't bit, or even byte addressable anymore, with DRAM, as any reads and writes go into an I/O buffer and reads and writes are handled as blocks (although it's possible for a block to be sent that only changes one bit). SRAM is still bit addressable, but it's expensive to get a large amount of that, but depending on implementation, the interface may only address bytes.
RAM I/O is handled by a memory controller built into the CPU and don't forget that DRAM is pretty much a bunch of leaky buckets and must be refreshed many times a second (16 is typical for DDR2 if I remember correctly), thankfully most memory controllers have a single command to trigger memory refresh.
Additionally, any time DRAM is read. the charge in read cells are lost and such blocks are written back to avoid data loss.
One of the reasons why C can be very fast is because pointers and structs map direct to the simulated address space and memory map with minimal overhead, so it's possible to arrange structs in alignment efficient ways, for loops in cache efficient ways and do pointer arithmetic to quickly make calculations, for example the length of data to copy;
memcpy(sneed, feed, chuck-feed);
would very efficiently map to approximately (ignoring caller-save to avoid complexity);
mov [sneed],%rdi //0th argument
mov [feed],%rsi //1st argument
sub chuck,feed,%rdx //2nd argument
call mempy
Meanwhile, good luck turning a method call into 4 instructions in your typical OOP language.
Pretty much, C maps very well to existing abstractions, that map to the hardware, so it runs very fast, despite no longer being close to the hardware.
>if you use a compiler like Tiny C Compiler without optimizations stuff maps close to cpu instructions
Even TCC does some optimizations for divisions etc, meaning there is no direct mapping to CPU instructions, although the output is pretty similar.
I could keep going, but it'll probably be better for me to answer specific wonderings. -
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feld (feld@bikeshed.party)'s status on Friday, 24-Nov-2023 23:04:04 JST 
feld
@Moon didn't David explain it here?
Modern hardware has so many abstractions that C will never be aware of. You can't choose if your memory allocation should be in RAM, L1, L2, L3, etc as one example.
https://queue.acm.org/detail.cfm?id=3212479 -
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feld (feld@bikeshed.party)'s status on Friday, 24-Nov-2023 23:04:57 JST
feld
@NEETzsche @Moon ASM has the same problems / limitations as C though. The hardware is too much of a black box -
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feld (feld@bikeshed.party)'s status on Friday, 24-Nov-2023 23:08:04 JST
feld
@piggo @methyltheobromine @Moon @newt how is D broken by design ? -
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narcolepsy and alcoholism :flag: (hj@shigusegubu.club)'s status on Friday, 24-Nov-2023 23:10:04 JST 
narcolepsy and alcoholism :flag:
@feld @methyltheobromine @piggo @Moon @newt too flaccid Haelwenn /элвэн/ :triskell: and feld like this. -
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Sexy Moon (moon@shitposter.club)'s status on Saturday, 25-Nov-2023 01:31:55 JST
Sexy Moon
@feld my issue was that I didn't understand the context for the original statement. no programming language has access to that, but it's fair to say that C is not "close to hardware" even if nothing is. -
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SlicerDicer (slicerdicer@bikeshed.party)'s status on Saturday, 25-Nov-2023 01:33:35 JST 
SlicerDicer
@Moon @piggo @methyltheobromine @newt >> I'm not really defending C I just don't understand the statement very well.
I will defend it, it runs like hell when you need it to. It will bite you like that shark. Till you bleed enough time to just understand. That’s all, my stuff is rock solid.
Dunno why there’s this war with C/C++ it’s not possible to accomplish some tasks unless you want to resort to assembly.Sexy Moon likes this.
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