The SPUs were cheap vector processors with 256KiB of internal RAM. The whole point was to fit lots of SPUs in the chip! The communicated between themselves, main RAM, & the coordinator (for PS3, a PowerPC core) via FIFO channels on a token-ring network.
The Reduceron is a simple stack machine targetting Haskell semantics. Implemented mainly being copying lightly-modified data between independently-addressed RAM banks. Not very powerful, but I've taken care of the power with GPUs & SPUs!
2/2!