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<blockquote style="position: relative; padding-left: 55px;"><section><a href="https://akko.erincandescent.net/objects/0599ff3a-f8d7-49f6-98bb-de13351b7deb">Erin 💽✨ (erincandescent@akko.erincandescent.net)'s status on Tuesday, 10-Sep-2024 05:55:20 JST</a><a href="https://akko.erincandescent.net/users/erincandescent" title="erincandescent@akko.erincandescent.net"><img src="https://gnusocial.jp/avatar/242079-48-20240514235327.webp" width="48" height="48" alt="Erin 💽✨" style="position: absolute; left: 0; top: 0;">Erin 💽✨</a><div><ul><li><li><a href="https://gnusocial.jp/user/97051" title="cks@mastodon.social">Chris Siebenmann</a></li><li><a href="https://gnusocial.jp/user/281046" title="zev@honk.bewilderbeest.net">zev</a></li></ul></div></section><article><p><a href="https://honk.bewilderbeest.net/u/zev">@zev</a> <a href="https://mastodon.social/@cks">@cks</a> <a href="https://infosec.exchange/@0x0ddc0ffee">@0x0ddc0ffee</a> <a href="https://oldbytes.space/@drscriptt">@drscriptt</a> for modern servers (where modern is basically.. everything since around when AMD released EPYC or so?) there is no PCH. The BMC handles basically all legacy IO functions.</p><p>Power on is triggered by the BMC tickling the pin on the ATX connector and then the CPU starts reading the BIOS from the BIOS ROM over either LPC or eSPI</p></article><footer><a rel="bookmark" href="https://gnusocial.jp/conversation/3640620#notice-7135394">In conversation</a><time datetime="2024-09-10T05:55:20+09:00" title="Tuesday, 10-Sep-2024 05:55:20 JST">about 3 months ago</time> <span>from <span><a href="https://akko.erincandescent.net/objects/0599ff3a-f8d7-49f6-98bb-de13351b7deb" rel="external" title="Sent from akko.erincandescent.net via ActivityPub">akko.erincandescent.net</a></span></span><a href="https://akko.erincandescent.net/objects/0599ff3a-f8d7-49f6-98bb-de13351b7deb">permalink</a></footer></blockquote>

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Erin 💽✨ (erincandescent@akko.erincandescent.net)'s status on Tuesday, 10-Sep-2024 05:55:20 JSTErin 💽✨
@zev @cks @0x0ddc0ffee @drscriptt for modern servers (where modern is basically.. everything since around when AMD released EPYC or so?) there is no PCH. The BMC handles basically all legacy IO functions.
Power on is triggered by the BMC tickling the pin on the ATX connector and then the CPU starts reading the BIOS from the BIOS ROM over either LPC or eSPI
In conversationabout 3 months ago from akko.erincandescent.netpermalink

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