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    "; DROP TABLE Users; (turboretard9000@bae.st)'s status on Wednesday, 07-Feb-2024 00:56:46 JST"; DROP TABLE Users;"; DROP TABLE Users;
    in reply to
    • 翠星石
    @Suiseiseki bleghh it's been forever since I read up on AMD/Intel history, yeah you got that much right

    RISC-V implements 40 instructions in its base ISA, 163 for RV64GCS (+40 if you count the compressed instructions separately), the minimum needed to run a general purpose OS
    In conversationabout 10 months ago from bae.stpermalink
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