Conversation

Notices

1. Embed this notice
   ✧✦Catherine✦✧ (whitequark@mastodon.social)'s status on Wednesday, 31-Dec-2025 09:06:37 JST ✧✦Catherine✦✧

   OH: (while looking at a piece of crackhead codegen) "it's like watching a counter-strike player... one shot and then goddamn reload"

   • Embed this notice
     ✧✦Catherine✦✧ (whitequark@mastodon.social)'s status on Wednesday, 31-Dec-2025 09:41:30 JST ✧✦Catherine✦✧

     in reply to

     crackhead codegen in question

   • Embed this notice
     ✧✦Catherine✦✧ (whitequark@mastodon.social)'s status on Wednesday, 31-Dec-2025 09:41:30 JST ✧✦Catherine✦✧

     in reply to

     note the amount of jumps whose sole purpose appears to be "make the branch predictor do a pull-up"

   • Embed this notice
     dram🎀 (dramforever@mastodon.social)'s status on Wednesday, 31-Dec-2025 10:26:39 JST dram🎀

     in reply to

     @whitequark where did they find this -O-1 code

   • Embed this notice
     ✧✦Catherine✦✧ (whitequark@mastodon.social)'s status on Wednesday, 31-Dec-2025 10:58:14 JST ✧✦Catherine✦✧

     in reply to

     • I love this, so I

     @jpm my core [vexriscv in a funny configuration] would flush the pipeline every time (and make the vcd hard to read) which is why i went with "branch predictor" (that i don't have); you're right of course

   • Embed this notice
     I love this, so I (jpm@aus.social)'s status on Wednesday, 31-Dec-2025 10:58:15 JST I love this, so I

     in reply to

     @whitequark … does the branch predictor even do anything on an unconditional jump? It’s basically an `ADDI zero, zero, 0` wearing a funny hat

   • Embed this notice
     ✧✦Catherine✦✧ (whitequark@mastodon.social)'s status on Wednesday, 31-Dec-2025 17:03:43 JST ✧✦Catherine✦✧

     in reply to

     • m_on_stair

     @m like a push-up but for electronics

   • Embed this notice
     m_on_stair (m@miruku.cafe)'s status on Wednesday, 31-Dec-2025 17:03:45 JST m_on_stair

     in reply to

     @whitequark@mastodon.social whats a pull up?

   • Embed this notice
     dram🎀 (dramforever@mastodon.social)'s status on Wednesday, 31-Dec-2025 23:13:07 JST dram🎀

     in reply to

     • Matt Mullins

     @whitequark @mokomull in case you're wondering, you can tell by the lui a0, 0x10000

     mips lui has only 16 bits of immediate, so this can't be mips. riscv has 20 bits so yay

   • Embed this notice
     ✧✦Catherine✦✧ (whitequark@mastodon.social)'s status on Wednesday, 31-Dec-2025 23:13:08 JST ✧✦Catherine✦✧

     in reply to

     • Matt Mullins

     @mokomull this is risc-v

   • Embed this notice
     Matt Mullins (mokomull@macaw.social)'s status on Wednesday, 31-Dec-2025 23:13:11 JST Matt Mullins

     in reply to

     @whitequark this *almost* feels like NaCl ("native client", not the cryptography library) that required explicitly jumping forward so that no instruction would straddle a 32-byte boundary.

     Except that isn't even a problem by definition in MIPS instruction encoding...