implemented a script for #GlasgowInterfaceExplorer that lets you discover the connectivity of any IC with JTAG boundary scan, provided you can give the IC an arbitrary stimulus (here done by using a glasgow output connected to a needle point probe)
next up: making it possible to chain two components with JTAG (or just use two JTAG ports) so that their mutual connectivity can be discovered without deprocessing the PCB
@karotte yeah!! I'm a big fan of JTAG and Glasgow has a _lot_ of carefully built JTAG functionality; boundary scan just wasn't something I was doing until now because ... BSDL. I wrote a BSDL parser finally and now I can do BSCAN too!
@whitequark Potentially naive question: why not the other way round (have the IC configure everything as outputs, toggle them at seminrandom, and observe what the probe sees)? Is that not in general possible via JTAG?
@robryk to an extent, yes. but there are two nuances: 1. you control what you're probing, not just blasting the entire board. in the case in the video, I know there is nothing but the FPGA connected to those nets, therefore it is 100% safe 2. because of (1), if I put this into an applet and someone fucks up their board, I would not be at fault :)
@synnfynn you're welcome! repurposing e-waste into useful devices is a big part of why glasgow exists (in fact probably over half of what i do with it can be classified that way)
Thanks. Been looking for a device that could facilitate the modding of old mobile/cell phones that I tear down. Love, love your work. Thank you. :cyberheart_green: