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   ✧✦Catherine✦✧ (whitequark@mastodon.social)'s status on Monday, 05-May-2025 14:38:13 JST ✧✦Catherine✦✧

   oh my god, i've spent several hours tracking a bug in my debugger, trying to figure out why sometimes debug mode entry is just broken in a bizarre, seemingly impossible way

   did you think i fucked something up? no, it's ARM7TDMI that is wrong! it has so much errata, debug mode enter via debug request is basically completely unusable https://documentation-service.arm.com/static/5ed62dc5ca06a95ce53f9214?token=

   (distant screaming)

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     ✧✦Catherine✦✧ (whitequark@mastodon.social)'s status on Monday, 05-May-2025 14:47:04 JST ✧✦Catherine✦✧

     in reply to

     by the way, the "bizarre, seemingly impossible way" is that the CPU can execute an `STM r0, {r0-r15}` command just fine, but when asked to do `MSR CPSR_c, 0xc0` it just... doesn't switch the mode

     the MSR opcode is a single word. there's nothing in how it's executed that isn't already tested by the preceding and succeeding STM opcode. it doesn't touch system memory or anything; it's one of the simplest commands you can imagine. the data transferred by STM is always right

     it's just... broken

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     ✧✦Catherine✦✧ (whitequark@mastodon.social)'s status on Monday, 05-May-2025 14:47:38 JST ✧✦Catherine✦✧

     in reply to

     • Markus Werle
     • Niklas Hauser

     @markuswerle @salkinium big fan of his thesis!

   • Embed this notice
     Markus Werle (markuswerle@nrw.social)'s status on Monday, 05-May-2025 14:47:39 JST Markus Werle

     in reply to

     • Niklas Hauser

     @whitequark you could join forces with @salkinium who had much fun with similar issues.

     https://salkinium.com/master.pdf