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1. Embed this notice
   David JONES (drj@typo.social)'s status on Thursday, 02-Nov-2023 09:29:36 JST David JONES

   Welcome to #MOVember, one asm MOV instruction each day.

   The Motorola MC68000 has a BEAST of a MOV instruction.
   Official assembler mnemonic: MOVE. Refreshingly clear!

   You could move to and from registers and/or memory. 8-, 16-, 32- data sizes. Post increment, predecrement. Including memory-to-memory moves (*Ferris Bueller soundtrack voice*: Oh Yeah).

   `*d++ = *s++` is a single instruction in 68000.

   Officially destination on the right: MOVE A7,D0 copies the A7 register to D0

   Please 🔁

   #68k

   • Embed this notice
     clacke (clacke@libranet.de)'s status on Thursday, 02-Nov-2023 09:29:32 JST clacke

     in reply to

     • Tim Ward ⭐🇪🇺🔶 #FBPE
     • F4GRX Sébastien
     > In this IBM article from 2005, it is covered how the Motorola m68k, MIPS and PowerPC CPUs of that era handled unaligned access. The interesting thing to note here is that until the 68020, unaligned access would always throw a bus error. MIPS CPUs didn’t bother with unaligned access in the name of speed, and PowerPC took a hybrid approach, with 32-bit unaligned access allowed, but 64-bit (floating point) unaligned access resulting a bus error.

     
     hackaday.com/2022/05/10/data-a…

     @TimWardCam @f4grx @drj

   • Embed this notice
     Tim Ward ⭐🇪🇺🔶 #FBPE (timwardcam@c.im)'s status on Thursday, 02-Nov-2023 09:29:33 JST Tim Ward ⭐🇪🇺🔶 #FBPE

     in reply to

     • F4GRX Sébastien

     @f4grx @drj It was then, but I have a vague feeling that the 68010 or 20 allowed odd addresses. At a performance cost.

     Haelwenn /элвэн/ :triskell: repeated this.
   • Embed this notice
     F4GRX Sébastien (f4grx@chaos.social)'s status on Thursday, 02-Nov-2023 09:29:34 JST F4GRX Sébastien

     in reply to

     • Tim Ward ⭐🇪🇺🔶 #FBPE

     @TimWardCam @drj I am not sure any 68k supports unaligned word acesses. that is probably an address error exception.

   • Embed this notice
     Tim Ward ⭐🇪🇺🔶 #FBPE (timwardcam@c.im)'s status on Thursday, 02-Nov-2023 09:29:35 JST Tim Ward ⭐🇪🇺🔶 #FBPE

     in reply to

     @drj It's an awful long time ago that I wrote any 68000 assembler - this was during the development of the QL which actually used a 68008.

     One booby trap I seem to recall was to do with moving more than one byte at a time via an A register used as a pointer and containing an odd number. Didn't work at all, but I have a vague feeling that this got "fixed" (at the cost of additional bus cycles) in later processors?