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diagram of the memory cell, showing a y-decoder, x-decoder, output sense, and the basic cell, consisting of a FAMOS device (a FET with a floating gate) and a select transistor.

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diagram of the memory cell, showing a y-decoder, x-decoder, output sense, and the basic cell, consisting of a FAMOS device (a FET with a floating gate) and a select transistor.
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Tube❄️Time (tubetime@mastodon.social)'s status on Friday, 02-May-2025 15:45:19 JST Tube❄️Time
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here are four EPROM cells. the critical element is a transistor (circled) that has a floating gate -- a control electrode with no external connection! modern flash memories also use floating gates, but the construction is quite different.

In conversation about 8 months ago from mastodon.social permalink