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@aleksorsist @urja No, you're missing the point.

Because you're running on the output of the 8:1 serdes, your trigger logic is at 125 MHz. But the *input* can still toggle faster than that (remember the frontend BW is what. 300+ MHz?)

So you need to consider what happens if you have >1 toggle in that 8-bit stream of samples. You may need to advance more than one state in a single clock cycle.