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<blockquote style="position: relative; padding-left: 55px;"><section><a href="https://mastodon.social/users/whitequark/statuses/114425300818952145">✧✦Catherine✦✧ (whitequark@mastodon.social)'s status on Wednesday, 30-Apr-2025 14:38:51 JST</a><a href="https://mastodon.social/@whitequark" title="whitequark@mastodon.social"><img src="https://gnusocial.jp/avatar/105710-48-20230309163231.webp" width="48" height="48" alt="✧✦Catherine✦✧" style="position: absolute; left: 0; top: 0;">✧✦Catherine✦✧</a></section><article><p>this is the worst computer game i've ever played</p><p>i haven't even managed to get the values of every core register yet</p></article><footer><a rel="bookmark" href="https://gnusocial.jp/conversation/4978439#notice-9755441">In conversation</a><time datetime="2025-04-30T14:38:51+09:00" title="Wednesday, 30-Apr-2025 14:38:51 JST">about 4 days ago</time> <span>from <span><a href="https://mastodon.social/@whitequark/114425300818952145" rel="external" title="Sent from mastodon.social via ActivityPub">mastodon.social</a></span></span><a href="https://mastodon.social/@whitequark/114425300818952145">permalink</a><h4>Attachments</h4><ol><li><label><a rel="external" href="https://gnusocial.jp/attachment/4548372"># Things you wish ARM told you about this core; more explicitly or at all:
#  * The bit order in the scan chain 1 is backwards. This is technically documented (read p. 5-34)
#    _very carefully_, but not in a way that anybody would notice.
#  * The bit order in the data field of the scan chain 2 is documented backwards, but is not.
#  * If you interrupt the core with DBGREQ, you have to drop DBGREQ before it'll do anything.
#  * DBGACK can be set without DBGREQ. It is because DBGACK does a double duty as the signal that
#    causes the peripherals to ignore side effectful memory accesses while debugging. They tell you
#    to make your debugger set it while performing memory accesses.
#  * ... except that you do want peripherals to be manipulatable by your debugger, so sometimes
#    you don't actually want to do that. Also goddess knows whether any given peripheral does
#    anything different with DBGACK asserted and if yes then what the semantics of it is.</a></label><br><a href="https://files.mastodon.social/media_attachments/files/114/425/287/575/776/984/original/ffeef53315ce9e19.png" rel="external">https://files.mastodon.social/media_attachments/files/114/425/287/575/776/984/original/ffeef53315ce9e19.png</a></li></ol></footer></blockquote>

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✧✦Catherine✦✧ (whitequark@mastodon.social)'s status on Wednesday, 30-Apr-2025 14:38:51 JST ✧✦Catherine✦✧
this is the worst computer game i've ever played
i haven't even managed to get the values of every core register yet
In conversationabout 4 days ago from mastodon.socialpermalink
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1. # Things you wish ARM told you about this core; more explicitly or at all: # * The bit order in the scan chain 1 is backwards. This is technically documented (read p. 5-34) # _very carefully_, but not in a way that anybody would notice. # * The bit order in the data field of the scan chain 2 is documented backwards, but is not. # * If you interrupt the core with DBGREQ, you have to drop DBGREQ before it'll do anything. # * DBGACK can be set without DBGREQ. It is because DBGACK does a double duty as the signal that # causes the peripherals to ignore side effectful memory accesses while debugging. They tell you # to make your debugger set it while performing memory accesses. # * ... except that you do want peripherals to be manipulatable by your debugger, so sometimes # you don't actually want to do that. Also goddess knows whether any given peripheral does # anything different with DBGACK asserted and if yes then what the semantics of it is.
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