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<blockquote style="position: relative; padding-left: 55px;"><section><a href="https://libranet.de/objects/0b6b25a8-1366-ba7c-a228-90c512985258">clacke (clacke@libranet.de)'s status on Tuesday, 13-Aug-2024 09:59:56 JST</a><a href="https://libranet.de/profile/clacke" title="clacke@libranet.de"><img src="https://gnusocial.jp/theme/gnusocialjp/default-avatar-stream.png" width="48" height="48" alt="clacke" style="position: absolute; left: 0; top: 0;">clacke</a></section><article><p>LoongArch / LoongISA, looking up further details Re: <a href="https://social.treehouse.systems/@ariadne/112950119497767750" rel="noreferrer">social.treehouse.systems/@aria…</a></p><p><a href="https://en.wikipedia.org/wiki/Loongson#LoongISA" rel="noreferrer">en.wikipedia.org/wiki/Loongson…</a></p>The binary translation instructions have the specific benefit of speeding up Intel x86 CPU emulation at a cost of 5% of the total die area. The new instructions help a QEMU hypervisor translate instructions from x86 to MIPS with only a reported 30% performance penalty.<p><br>That's very interesting in the context how our ISAs will look in 100 years, how we handle legacy, the thread about Itanium the other day, etc.</p><p>The thing with "<i>Programmer at Large</i>" where our interstellar trade fleet 1000 years from now runs all these legacy systems in x86 emulators never fully leaves my mind.</p></article><footer><a rel="bookmark" href="https://gnusocial.jp/conversation/3511717#notice-6898164">In conversation</a><time datetime="2024-08-13T09:59:56+09:00" title="Tuesday, 13-Aug-2024 09:59:56 JST">about 3 months ago</time> <span>from <span><a href="https://libranet.de/display/0b6b25a8-1366-ba7c-a228-90c512985258" rel="external" title="Sent from libranet.de via ActivityPub">libranet.de</a></span></span><a href="https://libranet.de/display/0b6b25a8-1366-ba7c-a228-90c512985258">permalink</a></footer></blockquote>

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clacke (clacke@libranet.de)'s status on Tuesday, 13-Aug-2024 09:59:56 JST clacke
LoongArch / LoongISA, looking up further details Re: social.treehouse.systems/@aria…
en.wikipedia.org/wiki/Loongson…
The binary translation instructions have the specific benefit of speeding up Intel x86 CPU emulation at a cost of 5% of the total die area. The new instructions help a QEMU hypervisor translate instructions from x86 to MIPS with only a reported 30% performance penalty.

That's very interesting in the context how our ISAs will look in 100 years, how we handle legacy, the thread about Itanium the other day, etc.
The thing with "Programmer at Large" where our interstellar trade fleet 1000 years from now runs all these legacy systems in x86 emulators never fully leaves my mind.
In conversationabout 3 months ago from libranet.depermalink

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