Also good news: RESET goes low, then high and stays high on the first 6502.
However: the clock signal is 4 MHz!
The CPUs are supposed to run at 1MHz. However IIRC the clocks are supposed to be phase shifted so that the 6502s take turns in accessing the memory, as the 4KB are shared.
So something is iffy with the clock generation.
Embed Notice
HTML Code
Corresponding Notice
- Embed this notice
root42 (root42@chaos.social)'s status on Sunday, 26-May-2024 01:50:38 JSTroot42