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<blockquote style="position: relative; padding-left: 55px;"><section><a href="https://ioc.exchange/users/azonenberg/statuses/112397727015433718">Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Saturday, 11-May-2024 03:51:14 JST</a><a href="https://ioc.exchange/@azonenberg" title="azonenberg@ioc.exchange"><img src="https://gnusocial.jp/avatar/105628-48-20241102164802.webp" width="48" height="48" alt="Andrew Zonenberg" style="position: absolute; left: 0; top: 0;">Andrew Zonenberg</a><div><a href="https://ioc.exchange/@azonenberg/112397013265791168" rel="in-reply-to">in reply to</a></div></section><article><p>Back to firmware update work. The front panel SFTP firmware updater is now working!</p><p>Only thing missing is adding integrity checks across the SPI bus (right now the front MCU calculates the CRC on its end, I'd rather CRC on the main micro so that any errors in transmission will be detected and the flash will fail).</p><p>Then I can work on figuring out how to OTA the FPGA and main micro.</p></article><footer><a rel="bookmark" href="https://gnusocial.jp/conversation/3071421#notice-6088290">In conversation</a><time datetime="2024-05-11T03:51:14+09:00" title="Saturday, 11-May-2024 03:51:14 JST">about 7 months ago</time> <span>from <span><a href="https://ioc.exchange/@azonenberg/112397727015433718" rel="external" title="Sent from ioc.exchange via ActivityPub">ioc.exchange</a></span></span><a href="https://ioc.exchange/@azonenberg/112397727015433718">permalink</a><h4>Attachments</h4><ol><li><label><a rel="external" href="https://gnusocial.jp/attachment/2618777">Serial console log of front panel MCU showing bootloader entering DFU mode, erasing the application, writing new application to flash, and booting it successfully</a></label><br><a href="https://files.ioc.exchange/media_attachments/files/112/397/712/693/093/181/original/a42b7f69a81f520f.png" rel="external">https://files.ioc.exchange/media_attachments/files/112/397/712/693/093/181/original/a42b7f69a81f520f.png</a></li><li><label><a rel="external" href="https://gnusocial.jp/attachment/2618778">UART console log showing main MCU parsing ELF headers for front panel firmware image, then pushing it to the front panel MCU</a></label><br><a href="https://files.ioc.exchange/media_attachments/files/112/397/712/724/250/416/original/59c4c5355f34804b.png" rel="external">https://files.ioc.exchange/media_attachments/files/112/397/712/724/250/416/original/59c4c5355f34804b.png</a></li></ol></footer></blockquote>

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Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Saturday, 11-May-2024 03:51:14 JST Andrew Zonenberg
in reply to
Back to firmware update work. The front panel SFTP firmware updater is now working!
Only thing missing is adding integrity checks across the SPI bus (right now the front MCU calculates the CRC on its end, I'd rather CRC on the main micro so that any errors in transmission will be detected and the flash will fail).
Then I can work on figuring out how to OTA the FPGA and main micro.
In conversationabout 7 months ago from ioc.exchangepermalink
Attachments
1. Serial console log of front panel MCU showing bootloader entering DFU mode, erasing the application, writing new application to flash, and booting it successfully
  https://files.ioc.exchange/media_attachments/files/112/397/712/693/093/181/original/a42b7f69a81f520f.png
2. UART console log showing main MCU parsing ELF headers for front panel firmware image, then pushing it to the front panel MCU
  https://files.ioc.exchange/media_attachments/files/112/397/712/724/250/416/original/59c4c5355f34804b.png

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