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    Andrew Zonenberg (azonenberg@ioc.exchange)'s status on Wednesday, 27-Mar-2024 03:36:07 JSTAndrew ZonenbergAndrew Zonenberg
    in reply to

    And 3V0_N isn't working either.

    FPGA is, at least, alive and running a blinky (but without the SERDES rails being functional).

    And the main MCU responds over JTAG but I havent tried running code on it.

    Sooo basically we have no real communications capabilities (1V2 is needed for baseT ethernet, GTX rails needed for SFP+) but most of the rest of the board seem alive.

    3V0_N only powers one external trigger input so if that doesn't work it'll be annoying but not the end of the world.

    Off to bed for now. Tomorrow, I think I'll pull the board again then see if maybe IR bottom preheat plus hot air on top is sufficient to get these DC-DC modules reworked.

    In conversationWednesday, 27-Mar-2024 03:36:07 JST from ioc.exchangepermalink
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