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This is all being kept as intentionally simple as possible. One of the reasons, I think, for the failure to launch of ÆSIR and Turaco is that they are too complex, too much going on in a single board. Makes them a bitch to route and debug, hard to get excited about.

This is also meant to be generic, processor-neutral. It could work with anything from a 6502 up to a 32-bit MIPS or RISC-V type thing.