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   alcinnz (alcinnz@floss.social)'s status on Sunday, 19-Jan-2025 14:28:32 JST alcinnz

   • Elias Mårtenson

   Hey @loke , do you know of prior art for exposing RAM (& an address into it) to a CPU as registers?

   I'm harvesting links for comparing my "Arithmetic Core" design to 6502. I have plenty of 6502 links...

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     alcinnz (alcinnz@floss.social)'s status on Sunday, 19-Jan-2025 14:50:24 JST alcinnz

     in reply to

     • Elias Mårtenson

     @loke Thanks, it was worth asking.

     I'll look up Burroughs architecture, I believe I have a spot for such a link!

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     Elias Mårtenson (loke@functional.cafe)'s status on Sunday, 19-Jan-2025 14:50:25 JST Elias Mårtenson

     in reply to

     @alcinnz not really, but the opposite was common. The Apllo AGC did this for example. The registers were just addresses in memory.

     Another example that took it even further was the Burroughs architecture which didn't even have registers at all. Instead it used a stack architecture.