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   翠星石 (suiseiseki@freesoftwareextremist.com)'s status on Sunday, 08-Sep-2024 15:52:45 JST 翠星石

   in reply to

   • lamp
   @lamp Of course the bottom of the barrel CPU's that failed to bin any higher would perform worse than one of the previously highest-binning chips, clocked at more than 1 billion cycles/second higher also, plus the result of proprietary benchmarks are suspect as always.
   
   Also, the E8500 has triple the L2 cache and 3MB of it per core instead of 0.5MB per core, which means that it can keep crappy bloated benchmarking code memory in cache roughly thrice as often.
   
   Although the J1900 has 224KB of L1 cache, which is almost twice as much, that's 56KB per core, versus 64KB per code - and probably not much of the benchmark would have fit in the L1 cache anyway.
   
   
   Computer hardware really hasn't got that much faster recently when it comes to the old highish end versus the newer lowish end.
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     lamp (lamp@kitty.haus)'s status on Sunday, 08-Sep-2024 15:52:46 JST lamp
     hmm