Ethernet seems to be alive, both the RGMII PHY and the 10G SFP+ are now linked up.
No network traffic yet as there's nothing on the far side of the MAC in the FPGA yet.
But most/all of the IP stack logic is going to be happening on the MCU, so bringing up the QSPI interface is the logical next step.
That's a job for after work tomorrow though, it's late.