Vivado ILA screenshot showing quad SPI - APB bridge in action
https://files.ioc.exchange/media_attachments/files/112/411/693/716/138/191/original/ba80a6580d8e5b99.png
Made good progress on the FPGA - MCU link revamp.
All of system information/health registers (ID code, serial number, fan RPM, temp/voltage monitors, bitstream timestamp, etc) are now readable over QSPI-APB and the legacy-bus interface has been removed.
So far the bridge only works in read mode but I'll be adding write support shortly.
Once I have most of the registers converted over I'll start playing with memory mapping again on the MCU side.
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